1. Field of the Invention
The present invention relates to a display device including a direct current power generating circuit. In particular, the invention relates to an increase in a display quality of a display device by stabilizing an output voltage of a switching regulator type direct current power generating circuit.
2. Background Art
There is a case of including a drive circuit driven by a voltage higher than a voltage of a direct current main power source included in a display device. In this case, a drive power source which provides a predetermined voltage to the drive circuit is needed. In a power generating circuit provided in the drive power source, the voltage from the main power source is raised, generating the predetermined voltage.
As a method of raising the voltage, in addition to a charge pump method, there is a switching regulator method. Along with the improvement in resolution and definition of display panels in recent years, it happens that the high drive performance switching regulator method is employed in the power generating circuit. As one control mode of the switching regulator method, there is a pulse width modulation (PWM) mode, which stabilizes the output voltage by changing a pulse width which determines a period for which a switching element connected to a voltage raising circuit is turned on. Herein, the pulse width indicates a length of a period for which a signal sent to the switching element is of a high voltage value. In this mode, in the event that the output voltage is lower than a setting voltage (hereafter referred to as “the output voltage is L”), the on period of the switching element becomes longer by increasing the pulse width, and it is possible to increase the output voltage. Meanwhile, in the event that the output voltage is higher than the setting voltage (hereafter referred to as “the output voltage is H”), the on period of the switching element becomes shorter by reducing the pulse width, and it is possible to reduce the output voltage. By repeating these operations, it is possible to stabilize the output voltage in the vicinity of the setting voltage.
A power generating circuit provided in a display device according to a heretofore known technology is shown in FIG. 3. A configuration of the whole of the power generating circuit has many areas in common with a power generating circuit provided in a display device according to the invention. Therefore, a detailed description of the configuration is given in a description of an embodiment of the invention. At this point, a simple description will be given of an outline of the configuration of the power generating circuit.
As shown in FIG. 3, a voltage raising circuit 1 being provided in the power generating circuit, it raises the voltage of a main power source 11 of the display device. A switching element 2 which drives the voltage raising circuit 1 is connected. An on period signal generating module 3 being connected to the switching element 2, the on period signal generating module 3 outputs an on period signal S23 to signal line 23, which is a signal which turns on the switching element 2, to the switching element 2 during an on period.
Also, an output voltage detection module 4 is connected to an output voltage Vout of the voltage raising circuit 1. The output voltage detection module 4 detects whether the output voltage Vout is H or L for every certain cycle (hereafter referred to as a cycle). The output voltage detection module 4 outputs a voltage with a high voltage value (hereafter referred to as the H voltage) when the output voltage Vout is H, and a voltage with a low voltage value (hereafter referred to as the L voltage) when the output voltage Vout is L, as a detection code S21, to an on period determination module 5 by the signal line 21.
In the on period determination module 5, the length of the on period, that is, the pulse width, is determined based on the detection code S21, and output to the on period signal generating module 3 as on period information S22 by the signal line 22. Herein, the on period information S22 is a value which expresses the length of the period for which the switching element is to be turned on (the on period), with a clock signal PCLK cycle as a unit.
In the on period signal generating module 3, the on period signal S23 is generated based on the on period information S22, and output to the switching element 2 by signal line 23.
In the on period determination module 5, based on the detection code S21 at the first moment of each cycle (hereafter referred to as the commencement), the length of the on period, that is, the pulse width, in the period of the cycle following the cycle, is determined. As the length of the on period is set based on the clock signal PCLK used in a display by the display device, the length of the period is determined at an integral multiple of the clock signal PCLK cycle. Herein, the clock signal PCLK is, for example, a dot clock signal. Hereafter, the length of the period will be written with the clock signal PCLK cycle as the unit.
FIG. 4 is an outline diagram showing a configuration of the on period determination module 5. A period increase-decrease element 31, based on the detection code S21 input from the output voltage detection module 4 by the signal line 21, adds or subtracts a given width to or from a value of an input signal, which is current on period information S24 inputting by the signal line 24, and outputs it as a value of next on period information S25 by the signal line 25. Herein, the given width is set at 1. In this case, when the detection code S21 is the L voltage, the period increase-decrease element 31 adds 1 to the value of the input signal, and outputs it. When the detection code S21 is the H voltage, the period increase-decrease element 31 subtracts 1 from the value of the input signal, and outputs it.
The next on period information S25 is input into a D terminal of an information output module 32. Herein, the information output module 32, in accordance with a clock rising edge, continues to output D terminal information input at that time from a Q terminal until the rising edge of the next clock. A cycle signal CLK rising at the commencement of each cycle is input into a clock of the information output module 32. Therefore, the information output module 32, at the commencement of the next cycle, outputs the value of the next on period information S25 to the on period signal generating module 3 as the value of the on period information S22.
The on period signal generating module 3 generates the on period signal S23, based on the input on period information S22, and outputs it to the switching element 2. By means of the above, a control of the output voltage Vout is carried out.